Is it true that on a modern processor, parallelism is possible on a single core?











up vote
2
down vote

favorite
1












Edit3: I made a graph for my Edit2,
enter image description here



Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:




  • Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.

  • Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.

  • In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.


Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent. (See my second link)





Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.



My question came from here:




parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).











share|improve this question




















  • 1




    Aside from HyperThreading?
    – cHao
    2 hours ago










  • @cHao: What do you mean? HyperThreading is the only way to do so currently?
    – ptr_user7813604
    2 hours ago






  • 1




    It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
    – cHao
    2 hours ago










  • @cHao: Aha, then why he got 8 upvotes?
    – ptr_user7813604
    2 hours ago






  • 1




    @ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
    – Al Kepp
    1 hour ago

















up vote
2
down vote

favorite
1












Edit3: I made a graph for my Edit2,
enter image description here



Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:




  • Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.

  • Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.

  • In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.


Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent. (See my second link)





Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.



My question came from here:




parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).











share|improve this question




















  • 1




    Aside from HyperThreading?
    – cHao
    2 hours ago










  • @cHao: What do you mean? HyperThreading is the only way to do so currently?
    – ptr_user7813604
    2 hours ago






  • 1




    It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
    – cHao
    2 hours ago










  • @cHao: Aha, then why he got 8 upvotes?
    – ptr_user7813604
    2 hours ago






  • 1




    @ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
    – Al Kepp
    1 hour ago















up vote
2
down vote

favorite
1









up vote
2
down vote

favorite
1






1





Edit3: I made a graph for my Edit2,
enter image description here



Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:




  • Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.

  • Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.

  • In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.


Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent. (See my second link)





Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.



My question came from here:




parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).











share|improve this question















Edit3: I made a graph for my Edit2,
enter image description here



Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:




  • Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.

  • Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.

  • In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.


Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent. (See my second link)





Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.



My question came from here:




parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).








parallel cpu multicore






share|improve this question















share|improve this question













share|improve this question




share|improve this question








edited 2 mins ago

























asked 4 hours ago









ptr_user7813604

1266




1266








  • 1




    Aside from HyperThreading?
    – cHao
    2 hours ago










  • @cHao: What do you mean? HyperThreading is the only way to do so currently?
    – ptr_user7813604
    2 hours ago






  • 1




    It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
    – cHao
    2 hours ago










  • @cHao: Aha, then why he got 8 upvotes?
    – ptr_user7813604
    2 hours ago






  • 1




    @ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
    – Al Kepp
    1 hour ago
















  • 1




    Aside from HyperThreading?
    – cHao
    2 hours ago










  • @cHao: What do you mean? HyperThreading is the only way to do so currently?
    – ptr_user7813604
    2 hours ago






  • 1




    It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
    – cHao
    2 hours ago










  • @cHao: Aha, then why he got 8 upvotes?
    – ptr_user7813604
    2 hours ago






  • 1




    @ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
    – Al Kepp
    1 hour ago










1




1




Aside from HyperThreading?
– cHao
2 hours ago




Aside from HyperThreading?
– cHao
2 hours ago












@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago




@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago




1




1




It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago




It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago












@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago




@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago




1




1




@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago






@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago












3 Answers
3






active

oldest

votes

















up vote
5
down vote



accepted










On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention






share|improve this answer




























    up vote
    8
    down vote













    It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
    pipeline
    There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
    $$A = B + C,$$
    $$D = A + 3,$$
    you cannot execute both instructions at the same time. However you can execute
    $$A = B + C,$$
    $$D = D + 3,$$
    simultaneously by utilizing two ALUs.



    So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.






    share|improve this answer























    • And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
      – Ben Voigt
      2 hours ago




















    up vote
    2
    down vote













    There are lots of different types of parallelism.



    Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.



    Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.



    Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.






    share|improve this answer





















    • Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
      – ptr_user7813604
      20 mins ago










    • So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
      – ptr_user7813604
      17 mins ago











    Your Answer





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    StackExchange.MarkdownEditor.creationCallbacks.add(function (editor, postfix) {
    StackExchange.mathjaxEditing.prepareWmdForMathJax(editor, postfix, [["\$", "\$"]]);
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    return StackExchange.using("schematics", function () {
    StackExchange.schematics.init();
    });
    }, "cicuitlab");

    StackExchange.ready(function() {
    var channelOptions = {
    tags: "".split(" "),
    id: "135"
    };
    initTagRenderer("".split(" "), "".split(" "), channelOptions);

    StackExchange.using("externalEditor", function() {
    // Have to fire editor after snippets, if snippets enabled
    if (StackExchange.settings.snippets.snippetsEnabled) {
    StackExchange.using("snippets", function() {
    createEditor();
    });
    }
    else {
    createEditor();
    }
    });

    function createEditor() {
    StackExchange.prepareEditor({
    heartbeatType: 'answer',
    convertImagesToLinks: false,
    noModals: true,
    showLowRepImageUploadWarning: true,
    reputationToPostImages: null,
    bindNavPrevention: true,
    postfix: "",
    imageUploader: {
    brandingHtml: "Powered by u003ca class="icon-imgur-white" href="https://imgur.com/"u003eu003c/au003e",
    contentPolicyHtml: "User contributions licensed under u003ca href="https://creativecommons.org/licenses/by-sa/3.0/"u003ecc by-sa 3.0 with attribution requiredu003c/au003e u003ca href="https://stackoverflow.com/legal/content-policy"u003e(content policy)u003c/au003e",
    allowUrls: true
    },
    onDemand: true,
    discardSelector: ".discard-answer"
    ,immediatelyShowMarkdownHelp:true
    });


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    });














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    3 Answers
    3






    active

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    3 Answers
    3






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    oldest

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    oldest

    votes






    active

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    up vote
    5
    down vote



    accepted










    On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention






    share|improve this answer

























      up vote
      5
      down vote



      accepted










      On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention






      share|improve this answer























        up vote
        5
        down vote



        accepted







        up vote
        5
        down vote



        accepted






        On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention






        share|improve this answer












        On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention







        share|improve this answer












        share|improve this answer



        share|improve this answer










        answered 3 hours ago









        Nate Strickland

        3664




        3664
























            up vote
            8
            down vote













            It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
            pipeline
            There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
            $$A = B + C,$$
            $$D = A + 3,$$
            you cannot execute both instructions at the same time. However you can execute
            $$A = B + C,$$
            $$D = D + 3,$$
            simultaneously by utilizing two ALUs.



            So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.






            share|improve this answer























            • And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
              – Ben Voigt
              2 hours ago

















            up vote
            8
            down vote













            It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
            pipeline
            There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
            $$A = B + C,$$
            $$D = A + 3,$$
            you cannot execute both instructions at the same time. However you can execute
            $$A = B + C,$$
            $$D = D + 3,$$
            simultaneously by utilizing two ALUs.



            So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.






            share|improve this answer























            • And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
              – Ben Voigt
              2 hours ago















            up vote
            8
            down vote










            up vote
            8
            down vote









            It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
            pipeline
            There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
            $$A = B + C,$$
            $$D = A + 3,$$
            you cannot execute both instructions at the same time. However you can execute
            $$A = B + C,$$
            $$D = D + 3,$$
            simultaneously by utilizing two ALUs.



            So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.






            share|improve this answer














            It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
            pipeline
            There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
            $$A = B + C,$$
            $$D = A + 3,$$
            you cannot execute both instructions at the same time. However you can execute
            $$A = B + C,$$
            $$D = D + 3,$$
            simultaneously by utilizing two ALUs.



            So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.







            share|improve this answer














            share|improve this answer



            share|improve this answer








            edited 3 hours ago

























            answered 3 hours ago









            user110971

            3,0441716




            3,0441716












            • And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
              – Ben Voigt
              2 hours ago




















            • And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
              – Ben Voigt
              2 hours ago


















            And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
            – Ben Voigt
            2 hours ago






            And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
            – Ben Voigt
            2 hours ago












            up vote
            2
            down vote













            There are lots of different types of parallelism.



            Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.



            Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.



            Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.






            share|improve this answer





















            • Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
              – ptr_user7813604
              20 mins ago










            • So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
              – ptr_user7813604
              17 mins ago















            up vote
            2
            down vote













            There are lots of different types of parallelism.



            Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.



            Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.



            Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.






            share|improve this answer





















            • Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
              – ptr_user7813604
              20 mins ago










            • So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
              – ptr_user7813604
              17 mins ago













            up vote
            2
            down vote










            up vote
            2
            down vote









            There are lots of different types of parallelism.



            Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.



            Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.



            Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.






            share|improve this answer












            There are lots of different types of parallelism.



            Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.



            Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.



            Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.







            share|improve this answer












            share|improve this answer



            share|improve this answer










            answered 40 mins ago









            Evan

            1,994414




            1,994414












            • Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
              – ptr_user7813604
              20 mins ago










            • So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
              – ptr_user7813604
              17 mins ago


















            • Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
              – ptr_user7813604
              20 mins ago










            • So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
              – ptr_user7813604
              17 mins ago
















            Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
            – ptr_user7813604
            20 mins ago




            Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
            – ptr_user7813604
            20 mins ago












            So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
            – ptr_user7813604
            17 mins ago




            So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
            – ptr_user7813604
            17 mins ago


















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