Is it true that on a modern processor, parallelism is possible on a single core?
up vote
2
down vote
favorite
Edit3: I made a graph for my Edit2,
Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:
- Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.
- Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.
- In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.
Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent
. (See my second link)
Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.
My question came from here:
parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).
parallel cpu multicore
|
show 11 more comments
up vote
2
down vote
favorite
Edit3: I made a graph for my Edit2,
Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:
- Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.
- Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.
- In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.
Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent
. (See my second link)
Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.
My question came from here:
parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).
parallel cpu multicore
1
Aside from HyperThreading?
– cHao
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
1
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
1
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago
|
show 11 more comments
up vote
2
down vote
favorite
up vote
2
down vote
favorite
Edit3: I made a graph for my Edit2,
Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:
- Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.
- Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.
- In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.
Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent
. (See my second link)
Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.
My question came from here:
parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).
parallel cpu multicore
Edit3: I made a graph for my Edit2,
Edit2: In short, for my question I adopt the definitions on Wikipedia, and for the definition of the terms:
- Parallel: Two threads, run independently, at any physical instant. So one thread won't interrupt the other, at any instant.
- Concurrent: Two threads, run independently, interleavedly is allowed, i.e. not restricted to parallel, and one can interrupt the other.
- In short, for me and Wikipedia writers, Concurrent includes Parallel. Thanks.
Edit: Just to be clear, for me parallelism means true parallelism, I add a "true" for it because people I talked to tend to think parallel==concurrent
. (See my second link)
Is it true that on modern processor, "true" parallelism is possible on a single core? I asked elsewhere but didn't get a confirming answer. What I want to know is e.g. whether at t=0, two instructions are fetched and executed. At the same physical instant.
My question came from here:
parallel computing is impossible on a (one-core) single processor, as only one computation can occur at any instant (during any single clock cycle).
parallel cpu multicore
parallel cpu multicore
edited 2 mins ago
asked 4 hours ago
ptr_user7813604
1266
1266
1
Aside from HyperThreading?
– cHao
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
1
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
1
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago
|
show 11 more comments
1
Aside from HyperThreading?
– cHao
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
1
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
1
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago
1
1
Aside from HyperThreading?
– cHao
2 hours ago
Aside from HyperThreading?
– cHao
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
1
1
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
1
1
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago
|
show 11 more comments
3 Answers
3
active
oldest
votes
up vote
5
down vote
accepted
On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention
add a comment |
up vote
8
down vote
It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
$$A = B + C,$$
$$D = A + 3,$$
you cannot execute both instructions at the same time. However you can execute
$$A = B + C,$$
$$D = D + 3,$$
simultaneously by utilizing two ALUs.
So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
add a comment |
up vote
2
down vote
There are lots of different types of parallelism.
Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.
Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.
Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
add a comment |
3 Answers
3
active
oldest
votes
3 Answers
3
active
oldest
votes
active
oldest
votes
active
oldest
votes
up vote
5
down vote
accepted
On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention
add a comment |
up vote
5
down vote
accepted
On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention
add a comment |
up vote
5
down vote
accepted
up vote
5
down vote
accepted
On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention
On some processors this is (sometimes) possible. Since different instructions use different processor resources (ALU, floating point, load, store, etc), it's sometimes possible to parallelize some of them. For example, see here for details on how that works on an Ivy Bridge (x86) CPU: https://dendibakh.github.io/blog/2018/03/21/port-contention
answered 3 hours ago
Nate Strickland
3664
3664
add a comment |
add a comment |
up vote
8
down vote
It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
$$A = B + C,$$
$$D = A + 3,$$
you cannot execute both instructions at the same time. However you can execute
$$A = B + C,$$
$$D = D + 3,$$
simultaneously by utilizing two ALUs.
So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
add a comment |
up vote
8
down vote
It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
$$A = B + C,$$
$$D = A + 3,$$
you cannot execute both instructions at the same time. However you can execute
$$A = B + C,$$
$$D = D + 3,$$
simultaneously by utilizing two ALUs.
So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
add a comment |
up vote
8
down vote
up vote
8
down vote
It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
$$A = B + C,$$
$$D = A + 3,$$
you cannot execute both instructions at the same time. However you can execute
$$A = B + C,$$
$$D = D + 3,$$
simultaneously by utilizing two ALUs.
So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.
It is indeed possible to have parallelism on a superscalar processor. A superscalar processor can execute multiple instructions at the same time by using multiple execution units.
There are certain limitations depending on the architecture. It is not true parallelism. If you have to calculate
$$A = B + C,$$
$$D = A + 3,$$
you cannot execute both instructions at the same time. However you can execute
$$A = B + C,$$
$$D = D + 3,$$
simultaneously by utilizing two ALUs.
So as an answer to your question, you can have a certain level of parallelism on a single core, as long as your instructions do not use the same hardware resources.
edited 3 hours ago
answered 3 hours ago
user110971
3,0441716
3,0441716
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
add a comment |
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
And then many DSP architectures are explicitly MIMD (like SIMD, but the instructions to the different execution units are different). Unlike "implicit superscalar execution", this VLIW and "Explicitly parallel instruction computing" is scheduled by the linker, not discovered by the CPU logic.
– Ben Voigt
2 hours ago
add a comment |
up vote
2
down vote
There are lots of different types of parallelism.
Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.
Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.
Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
add a comment |
up vote
2
down vote
There are lots of different types of parallelism.
Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.
Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.
Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
add a comment |
up vote
2
down vote
up vote
2
down vote
There are lots of different types of parallelism.
Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.
Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.
Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.
There are lots of different types of parallelism.
Instruction level parallelism is a feature of any superscalar processor. Multiple instructions are in progress at any point in time. However, those instructions are from the same thread of control.
Thread level parallelism within a single core is possible with hyperthreading -- two separate threads using different core resources at the same time. One thread can use the integer ALU while another is executing a load or store.
Data level parallelism is also a type of parallelism. SIMD units can execute the same instructions on multiple registers at the same time. For instance, if you need to apply the same blur transformation to every pixel in an image, you might be able to do that 8 pixels in parallel, but within the same thread of control.
answered 40 mins ago
Evan
1,994414
1,994414
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
add a comment |
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
Great, and apologies that I think my "e.g. whether at t=0, two instructions are fetched and executed" is a wrong example, it's not the same as I thought it should be....
– ptr_user7813604
20 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
So is that for hyperthreading there is nothing duplicate in a single core, but using different core resources at the same time?
– ptr_user7813604
17 mins ago
add a comment |
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1
Aside from HyperThreading?
– cHao
2 hours ago
@cHao: What do you mean? HyperThreading is the only way to do so currently?
– ptr_user7813604
2 hours ago
1
It's the only way to achieve true parallelism with a single core, yes. Superscalar processing can do several things at once, but it can still only run one thread at a time.
– cHao
2 hours ago
@cHao: Aha, then why he got 8 upvotes?
– ptr_user7813604
2 hours ago
1
@ptr_user7813604 I looked at the first link, that one is "true parallelism". But this suspicious pseudo-term is not defined there. So maybe you could write the basic terms in your question, instead of providing just links.
– Al Kepp
1 hour ago